Qualcomm says the first silicon of its High Bandwidth Compute (HBC) memory design has passed hardware validation in its San Diego lab, and that a data center product built on it has already taped out. In an engineering blog post published November 2, Rashid Attar, the company’s SVP of engineering, describes HBC as DRAM bonded onto logic so that memory sits next to compute and less data has to travel. Qualcomm ties it to the Dragonfly AI250 inference accelerator, which it expects to sample in the first half of 2027.
Qualcomm frames memory bandwidth as the limit on serving large models
The argument starts from LLM inference, where every generated token needs model data supplied to the compute units. At data center scale, Qualcomm says, the energy and latency of that movement shape throughput, power draw and cost. HBC attacks it by moving compute closer to the memory, which the company says cuts data movement and raises effective bandwidth. The design uses DRAM tiers wafer-bonded to a logic base, with redundancy and remapping built in to work around memory defects, and Qualcomm says early bring-up of that logic base with bonded DRAM tiers is yielding today.
The validation covered the memory path and near-memory math with random data, not a running model
Using automated test equipment, Qualcomm’s engineers drove the silicon through the full memory read-write path and its near-memory computations, with randomized weights and activations at production-representative dimensions. That shows the stack works as memory and as a compute path. The post does not describe an inference run on it.
It calls the results measured, then adds in a footnote that its comparison figures are estimates, normalized to target operating conditions and set against published specifications of competing products, and that final performance will vary with product, workload and system configuration. The written text carries no bandwidth, capacity or power numbers, so the size of the advantage is not something a reader can check from it.
Qualcomm expects the HBC-based Dragonfly AI250 to sample in the first half of 2027
Qualcomm says the AI250 will bring HBC into a complete inference accelerator and into Dragonfly Rack, its rack-scale system built on an open, disaggregated architecture for hyperscalers, cloud providers and enterprises. The pitch is more tokens per dollar per watt. Sampling is not shipping, and the post gives no price, memory capacity or power rating for the AI250.